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Created page with "{{#set: |Is software=True |Has name={{PAGENAME}} |Has icon=File:Modelsim_logo.jpg |Has icondesc=Modelsim Icon |Has image=File:Mentor_image.jpg |Has description=HDL Simul..."
{{#set:
|Is software=True
|Has name={{PAGENAME}}
|Has icon=File:Modelsim_logo.jpg
|Has icondesc=Modelsim Icon
|Has image=File:Mentor_image.jpg
|Has description=HDL Simulation Software
|Has version=2020.3-se
|Has url=https://www.mentor.com/products/fv/modelsim/
}}
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{{#ask:[[{{FULLPAGENAME}}]]
|?Has icon=Software Logo
|?Has description=Description
|?Has version=Version
|?Has url=Web Page
|headers=show
|link=none
|format=plainlist
|template=SoftwareTable
|introtemplate=SoftwareEntryIntro
|outrotemplate=SoftwareTableOutro
}}
In addition to supporting standard HDLs, ModelSim increases design quality and debug productivity. ModelSim’s award-winning Single Kernel Simulator (SKS) technology enables transparent mixing of VHDL and Verilog in one design. Its architecture allows platform-independent compile with the outstanding performance of native compiled code.
The graphical user interface is powerful, consistent, and intuitive. All windows update automatically following activity in any other window. For example, selecting a design region in the Structure window automatically updates the Source, Signals, Process, and Variables windows. You can edit, recompile, and re-simulate without leaving the ModelSim environment. All user interface operations can be scripted and simulations can run in batch or interactive modes. ModelSim simulates behavioral, RTL, and gate-level code, including VHDL VITAL and Verilog gate libraries, with timing provided by the Standard Delay Format (SDF).
== Installation ==
Click this link to be directed to our internal site for {{PAGENAME}} install instructions and download [https://makerhub-internal.georgefox.edu/wiki/{{PAGENAME}} internal site]
|Is software=True
|Has name={{PAGENAME}}
|Has icon=File:Modelsim_logo.jpg
|Has icondesc=Modelsim Icon
|Has image=File:Mentor_image.jpg
|Has description=HDL Simulation Software
|Has version=2020.3-se
|Has url=https://www.mentor.com/products/fv/modelsim/
}}
[[{{#show: {{FULLPAGENAME}}|?Has image|link=none}}|375px|thumb|upright=1.5|{{#show: {{FULLPAGENAME}}|?Has imagedesc}}]]
{{#ask:[[{{FULLPAGENAME}}]]
|?Has icon=Software Logo
|?Has description=Description
|?Has version=Version
|?Has url=Web Page
|headers=show
|link=none
|format=plainlist
|template=SoftwareTable
|introtemplate=SoftwareEntryIntro
|outrotemplate=SoftwareTableOutro
}}
In addition to supporting standard HDLs, ModelSim increases design quality and debug productivity. ModelSim’s award-winning Single Kernel Simulator (SKS) technology enables transparent mixing of VHDL and Verilog in one design. Its architecture allows platform-independent compile with the outstanding performance of native compiled code.
The graphical user interface is powerful, consistent, and intuitive. All windows update automatically following activity in any other window. For example, selecting a design region in the Structure window automatically updates the Source, Signals, Process, and Variables windows. You can edit, recompile, and re-simulate without leaving the ModelSim environment. All user interface operations can be scripted and simulations can run in batch or interactive modes. ModelSim simulates behavioral, RTL, and gate-level code, including VHDL VITAL and Verilog gate libraries, with timing provided by the Standard Delay Format (SDF).
== Installation ==
Click this link to be directed to our internal site for {{PAGENAME}} install instructions and download [https://makerhub-internal.georgefox.edu/wiki/{{PAGENAME}} internal site]